make Command

Purpose

Maintains, updates, and regenerates groups of programs.

Syntax

make [ -DVariable ] [ -d Option ] [ -e ] [ -i ] [ -j[Jobs]] [ -k ] [ -n ] [ -p ] [ -q ] [ -r ] [ -S ] [ -s ] [ -t ] [ -f MakeFile ... ] [ Target ... ]

Description

The make command assists you in maintaining a set of programs. Input to the make command is a list of file dependency specifications.

There are four types of lines in a makefile: file dependency specifications, shell commands, variable assignments, and comments. In general, lines can be continued from one line to the next by ending them with a \ (backslash). The trailing newline character and initial white space on the following line are compressed into a single space.

File Dependency Specifications

Dependency lines consist of one or more targets, an operator, and zero or more prerequisites (sources). This creates a relationship where the targets depend on the prerequisites and are usually created from them. The exact relationship between the target and the prerequisite is determined by the operator that separates them. The operators are as follows:

Item Description
: A target is considered out-of-date if its modification time is less than that of any of its prerequisites. Prerequisites for a target accumulate over dependency lines when this operator is used. The target is removed if the make command is interrupted, unless the target has the .PRECIOUS attribute.
:: If no prerequisites are specified, the target is always recreated. Otherwise, a target is considered out-of-date if any of its prerequisites were modified more recently than the target. Prerequisites for a target do not accumulate over dependency lines when this operator is used. The target is not removed if the make command is interrupted.

File dependency specifications have two types of rules, inference and target. Inference rules specify how a target is to be made up-to-date. These rules have one target with no / (slash) and a minimum of one . (period). Target rules specify how to build the target. These rules can have more than one target.

Makefile Execution

The make command executes the commands in the makefile line by line. As make executes each command, it writes the command to standard output (unless otherwise directed, for example, using the -s flag). A makefile must have a Tab in front of the commands on each line.

When a command is executed through the make command, it uses make's execution environment. This includes any macros from the command line to the make command and any environment variables specified in the MAKEFLAGS variable. The make command's environment variables overwrite any variables of the same name in the existing environment.
Note: When the make command encounters a line beginning with the word include followed by another word that is the name of a makefile (for example, include depend), the make command attempts to open that file and process its contents as if the contents were displayed where the include line occurs. This behavior occurs only if the first noncomment line of the first makefile read by the make command is not the .POSIX target; otherwise, a syntax error occurs.

Comments: Comments begin with a # character, anywhere but in a shell command line, and continue to the end of the line.

Environment: The make command uses the MAKEFLAGS environment variable, if it exists.

Target Rules

Target rules have the following format:

target[target...] : [prerequisite...] [;command]
<Tab>command
Multiple targets and prerequisites are separated by spaces. Any text that follows the ; (semicolon) and all of the subsequent lines that begin with a Tab character are considered commands to be used to update the target. A new target entry is started when a new line does not begin with a Tab or # character.
Note: The list of prerequisites can be empty.

Special Targets

Special targets cannot be included with other targets; that is, they must be the only target specified. These targets control the operation of the make command. These targets are:

Item Description
.DEFAULT This is used as the rule for any target (that was used only as a prerequisite) that the make command cannot figure out any other way to create. Only the shell script is used. The < (left angle bracket) variable of a target that inherits .DEFAULT's commands is set to the target's own name.
.IGNORE Prerequisites of this target are targets themselves; this causes errors from commands associated with them to be ignored. If no prerequisites are specified, this is the equivalent of specifying the -i flag.
.POSIX Causes the make command to use a different default rules file. The file, /usr/ccs/lib/posix.mk, provides the default rules as specified in the POSIX standard.
.PRECIOUS Prerequisites of this target are targets themselves. .PRECIOUS prevents the target from being removed. If no prerequisites are specified, the .PRECIOUS attribute is applied to every target in the file. Usually, when make is interrupted (for example, with SIGHUP, SIGTERM, SIGINT, or SIGQUIT), it removes any partially made targets. If make was invoked with the -n, -p, or -q flags, the target is considered to have the .PRECIOUS attribute.
.SCCS_GET This special target must be specified without prerequisites. If this special target is included in a makefile, the commands associated with this special target are used to get all SCCS files that are not found in the current directory. The default commands that are used to retrieve the source files from SCCS are replaced by the commands associated with this special target. When source files are named in a dependency list, make treats them just like any other target. When a target has no dependencies, but is present in the directory, make assumes that the file is up-to-date. If, however, a SCCS file named SCCS/s.source_file is found for a target source_file, make additionally checks to assure that the target is up-to-date. If the target is missing, or if the SCCS file is newer, make automatically issues the commands specified for the .SCCS_GET special target to retrieve the most recent version. However, if the target is writable by anyone, make does not retrieve a new version.
.SILENT Prerequisites of the target are targets themselves. This causes commands associated with the target to not be written to standard output before they are executed. If no prerequisites are specified, the .SILENT attribute is applied to every command in the file.
.SUFFIXES Use this name to add more suffixes to the list of file suffixes that make recognizes. Prerequisites of the target are appended to the list of known suffixes. If no suffixes are specified, any previously specified suffixes are deleted. These suffixes are used by the inference rules. To change the order of suffixes, you need to specify an empty .SUFFIXES entry and then a new list of .SUFFIXES entries. A makefile must not associate commands with .SUFFIXES.

Inference Rules

The make command has a default set of inference rules, which you can supplement or overwrite with additional inference rules definitions in the makefile. The default rules are stored in the external file, /usr/ccs/lib/aix.mk. You can substitute your own rules file by setting the MAKERULES variable to your own file name from the command line. The following line shows how to change the rules file from the command line:

make MAKERULES=/pathname/filename

Inference rules consist of target suffixes and commands. From the suffixes, the make command determines the prerequisites, and from both the suffixes and their prerequisites, the make command determines how to make a target up-to-date. Inference rules have the following format:

rule:
<Tab>command
...

where rule has one of the following forms:

Item Description
.s1 A single-suffix inference rule that describes how to build a target that is appended with one of the single suffixes.
.s1.s2 A double-suffix inference rule that describes how to build a target that is appended with .s2 with a prerequisite that is appended with .s1.

The .s1 and .s2 suffixes are defined as prerequisites of the special target, .SUFFIXES. The suffixes .s1 and .s2 must be known suffixes at the time the inference rule is displayed in the makefile. The inference rules use the suffixes in the order in which they are specified in .SUFFIXES. A new inference rule is started when a new line does not begin with a <Tab> or # character.

If rule is empty, for example:

rule: ;

execution has no effect, and the make command recognizes that the suffix exists, but takes no actions when targets are out-of-date.

A ~ (tilde) in the preceding rules refers to an SCCS file. Therefore, the rule, .c~.o, would transform an SCCS C language prerequisite file into an object file (.o). Because the s. of the SCCS file is a prefix, it is incompatible with the make command's suffix view. The ~ (tilde) is a way of changing any file reference into an SCCS file reference.

Libraries

A target or prerequisite can also be a member of an archive library and is treated as such if there are parentheses in the name. For example, library(name) indicates that name is a member of the archive library library. To update a member of a library from a particular file, you can use the format .s1.a, where a file with the .s1 suffix is used to update a member of the archive library. The .a refers to an archive library.

Using Macros

In makefiles, macro definitions are defined in the format:

variable=value

Macros can be displayed throughout the makefile, as follows:

If a macro has no definition, it defaults to NULL. A new macro definition overwrites an existing macro of the same name. Macros assignments can come from the following, in the listed order:

  1. Default inference rules
  2. Contents of the environment
  3. Makefiles
  4. Command lines.
    Note: The -e flag causes environment variables to override those defined in the makefile.
The SHELL macro is special. It is set by the make command to the path name of the shell command interpreter (/usr/bin/sh). However, if it is redefined in the makefile or on the command line, this default setting is overridden.
Note: The SHELL macro does not affect, and is not affected by, the SHELL environment variable.

Shell Commands

Each target can have associated with it a series of shell commands, usually used to create the target. Each of the commands in this script must be preceded by a Tab. While any target can be displayed on a dependency line, only one of these dependencies can be followed by a creation script, unless the :: operator is used.

If the first, or first two characters, of the command line are one or all of @ (at sign), - (hyphen), and + (plus sign), the command is treated specially, as follows:

Item Description
@ Causes the command not to be echoed before it is executed.
- Causes any nonzero exit status of the command line to be ignored.
+ Causes a command line to be executed, even though the options -n, -q, or -t are specified.

A command that has no metacharacters is directly executed by the make command. For example, the make command consigns the first command in the following example to the shell because it contains the > (greater than sign) shell metacharacter. The second command in the following example does not contain any shell metacharacters, so the make command executes it directly:

target: dependency
        cat dependency > target
        chmod a+x target

Bypassing the shell saves time, but it can cause problems. For example, attempting to execute a C shell script from within a makefile by setting the SHELL macro to /bin/csh will not work unless the command line also contains at least one shell metacharacter.

SHELL=/bin/csh
   
target: dependency
        my_csh_script

This makefile fails because the make command attempts to run my_csh_script instead of consigning it to the C shell.

Variable Assignments

Variables in the make command are much like variables in the shell and consist of all uppercase letters. The = operator assigns values to variables. Any previous variable is then overridden. Any white space before the assigned value is removed.

Values can be appended to macro values as follows:
macro += word ... 
macro += macro1 

The += operator when used in place of = appends the new value with a single space is inserted between the previous contents of the variable and the appended value.

Variables are expended by surrounding the variable name with either { } (braces) or ( ) (parentheses) and preceding it with a $ (dollar sign). If the variable name contains only a single letter, the surrounding braces or parentheses are not required. This shorter form is not recommended.

Variable substitution occurs at two distinct times, depending on where the variable is being used. Variables in dependency lines are expanded as the line is read. Variables in shell commands are expanded when the shell command is executed.

The four classes of variables (in order of increasing precedence) are:

Item Description
Environment Variables defined as part of the make command's environment.
Global Variables defined in the makefile or in included makefiles.
Command line Variables defined as part of the command line.
Local Variables defined specific to a certain target. The local variables are as follows:
$<
Represents either the full name of a prerequisite that made a target out-of-date (inference rule), or the full name of a target (.DEFAULT rule).
$*
Represents the file name section of a prerequisite that made a target out-of-date (in an inference rule) without a suffix.
$@
Represents the full target name of the current target or the archive file name part of the library archive target.
$%
Represents a library member in a target rule if the target is a member of the archive library.

You can also use these local variables appended with D or F:

D
Indicates that the local variable applies to the directory part of the name. This is the path name prefix without a trailing / (slash). For current directories, D is a . (period).
F
Indicates that the local variable applies to the file name part of the name.

In addition, the make command sets or knows about the following variables:

$ A single $ (dollar sign); that is, $$ expands to a single dollar sign.
LANG Determines the locale to use for the locale categories when both LC_ALL and the corresponding environment variable (beginning with LC_) do not specify a locale.
LC_ALL Determines the locale to be used to override any values for locale categories specified by the setting of LANG or any other LC_ environment variable.
LC_CTYPE Determines the locale for the interpretation of sequences of bytes of text data as characters; for example, single- versus multibyte characters in arguments.
LC_MESSAGES Determines the language in which messages should be written.
MAKEFLAGS The environment variable, MAKEFLAGS, can contain anything that can be specified on make's command line. Anything specified on make's command line is appended to the MAKEFLAGS variable, which is then entered into the environment for all programs that make executes. Note that the operation of the -f and -p flags in the MAKEFLAGS variable is undefined. Command line flags take precedence over the -f and -p flags in this variable.
VPATH Allows you to specify a list of directories to search for prerequisites. The list of directories works like the PATH variable in the SHELL. The VPATH variable can specify multiple directories separated by colons. For example:
VPATH=src:/usr/local/src

This tells the make command to search for the following directories in the order given:

  • The current directory (this happens even without VPATH)
  • src (a subdirectory in the current directory )
  • /usr/local/src.

Flags

Item Description
-DVariable Sets the value of Variable to 1.
-dOption Displays detailed information about the files and times that make examines (debug mode). The -d flag without any options or with the A option displays all the debug information available. Individually selectable debug options follow:
A
Displays all possible debug information.
a
Displays debug information about archive searching and caching.
d
Displays debug information about directory searching.
g1
Displays debug information about input graph before making anything.
g2
Displays debug information about input graph after making everything, or before exiting on an error.
m
Displays debug information about making targets, including modification dates.
s
Displays debug information about suffix searching.
v
Displays debug information about variable assignments.
-e Specifies that environmental variables override macro assignments within makefiles.
-f MakeFile Specifies a makefile to read instead of the default makefile. If MakeFile is - (hyphen), standard input is read. Multiple makefiles can be specified and are read in the order specified.
-i Ignores nonzero exit of shell commands in the makefile. Equivalent to specifying - (hyphen) before each command line in the makefile.
-j[Jobs] Specifies the number of parallel jobs that make should use to build the independent targets. The Jobs parameter can take any positive integral values. If Jobs is not specified, make does not limit the number of parallel jobs for building the main target. For more information, see Using the make Command in Parallel Execution Mode in the make Command Overview section in AIX® Version 7.1 General Programming Concepts: Writing and Debugging Programs
-k Continues processing after errors are encountered, but only on those targets that do not depend on the target whose creation caused the error.
-n Displays commands, but does not run them. However, lines beginning with a + (plus sign) are executed.
-p Displays the complete set of macro definitions and target descriptions before performing any commands.
-q Returns a zero status code if the target file is up-to-date; returns a one status code if the target file is not up-to-date. Targets will not be updated when this option is specified. However, a command line with the + (plus sign) prefix will be executed.
-r Does not use the default rules.
-S Terminates the make command if an error occurs. This is the default and the opposite of -k flag.
-s Does not display commands on the screen as they are performed.
-t Creates a target or updates its modification time to make it seem up-to-date. Executes command lines beginning with a + (plus sign).
Target Specifies a target name of the form Target or sets the value of variables.

Exit Status

When the -q flag is specified, this command returns the following exit values:

Item Description
0 Successful completion.
1 The target was not up-to-date.
>1 An error occurred.

Otherwise, this command returns the following exit values:

Item Description
0 Successful completion.
>1 An error occurred.

Examples

  1. To make the first target found in the makefile, type:
    make
  2. To display, but not run, the commands that the make command would use to make a file:

    make  -n search.o

    Doing this will verify that a new description file is correct before using it.
  3. To create a makefile that says that pgm depends on two files, a.o and b.o, and that they, in turn, depend on their corresponding prerequisite files (a.c and b.c) and a common file, incl.h, type:
    pgm: a.o b.o
              c89 a.o b.o -o pgm
    a.o: incl.h a.c
              c89 -c a.c
    b.o: incl.h b.c
              c89 -c b.c
  4. To make optimized .o files from .c files, type:
    .c.o:
              c89 -c -o $*.c
    or:
    .c.o:
              c89 -c -o $<
  5. To view the contents of the built-in rules, type:

    make  -p  -f /dev/null 2>/dev/null

  6. To use the make command in parallel mode with a maximum of 10 parallel jobs to be used for building the target specified in the makefile, type:
    make -j10

Files

Item Description
makefile Contains a list of dependencies.
Makefile Contains a list of dependencies.
s.makefile Contains a list of dependencies. It is an SCCS file.
s.Makefile Contains a list of dependencies. It is an SCCS file.
/usr/ccs/lib/posix.mk Contains default POSIX rules for the make command.
/usr/ccs/lib/aix.mk Contains default rules for the make command.